As a conventional capacitor dielectric film for forming a cell capacity of a memory cell of a DRAM (Dynamic Random Access Memory) as a semiconductor memory, an ONO film in which SiO.sub.2, Si.sub.3 N.sub.4, and SiO.sub.2 are sequentially laminated is used. However, the effective relative dielectric constant of the ONO film is as small as about 5, and in case it is applied to a large-capacity memory of 256 Mbit or less, the process is considerably difficult.
On the contrary, since an insulating metal oxide represented by Ta.sub.2 O.sub.5, (Ba, Sr)TiO.sub.3 (hereinafter, abbreviated to BST), and Pb(Zr, Ti)O.sub.3 (hereinafter, abbreviated to PZT) has a large relative dielectric constant from several tens to several hundreds, a capacitor dielectric material for a future DRAM is noticed.
Next, as an example, a case where the metal oxide thin-film capacitor is formed using BST as a metal oxide is mentioned, and the problems of the prior art are mentioned.
In a conventional high-dielectric capacitor Cap shown in FIG. 16*, a lower electrode 38 (using a noble metal such as Pt, Ir, and Ru in terms of oxidation resistance) is laminated on a barrier metal layer 39 (using a nitride such as TiN and TaN in terms of oxidation resistance) for preventing the diffusion of an electrode-constituting component, and a BST high-dielectric thin-film 40 is formed on the lower electrode 38 by sputtering method, chemical vapor deposition method (CVD), or sol-gel method. Furthermore, an upper electrode 37 (using a noble metal such as Pt, Ir, and Ru similarly to the lower electrode 38) is formed in almost the same pattern as the above.
Then, on the side surface of the barrier metal layer 39 and the lower electrode 38, a spacer (side wall for securing insulation) 35 composed of a silicon oxide film is formed. Also, the lower electrode 38 is connected to a silicon substrate side via a metal layer (plug) 8 such as polysilicon as a storage node embedded in a contact hole 14 of an insulating film 7 such as SiO.sub.2.
A memory cell of the DRAM having the high-dielectric capacitor is explained. For example, an element area divided by a field oxide film 2 is formed on one principal plane of a P.sup.- silicon substrate, and a transfer gate TR consisting of a MOS transistor and a memory cell M-Cel consisting of the high-dielectric capacitor Cap are installed in it. The memory cell is a CUB (Cell under Bitline) type.
In the transfer gate TR, for example, N.sup.+ drain region 3 and N.sup.+ source region 4 are respectively formed by an impurity diffusion, and a word line 6 (WL) is installed via a gate oxide film 5 between these two regions. A bit line 24 (BL) is connected via a contact hole 16 of insulating layers 7 and 47 such as SiO.sub.2 to the drain region 3.
In FIG. 16, a thin BST film 40 is formed by CVD method, sputtering method, sol-gel method, etc.; however, its formation is carried out in an oxygen atmosphere. Furthermore, after forming a capacitor, a heat treatment (hereinafter, called a postannealing) [is carried out] in an oxygen atmosphere of 1 atm to improve its leakage current characteristic and dielectric characteristic.
As for the postannealing, FIG. 17 shows a relationship between the current-voltage characteristic and the postannealing temperature (500.degree. C., 700.degree. C.) of a BST capacitor, in which the BST film 40 is formed at a film thickness of 25 nm on the Pt lower electrode 38 at a substrate temperature of 550.degree. C. by a sputtering method. Here, the upper electrode is Pt, and the postannealing time is 30 min.
As seen from FIG. 17, compared with nonpostannealing (as-deposited), the leakage current characteristic after postannealing is largely improved. Also, the higher the postannealing temperature, the smaller the leakage current density.
Thus, the leakage current characteristic of the capacitor is markedly improved by postannealing, and as the treatment temperature increases, a large effect is obtained.
However, since the above-mentioned postannealing is carried out in an oxygen atmosphere, a barrier metal 39 of FIG. 16 is oxidized in the meantime, so that TiO.sub.2, for instance, is formed. The reason for this is considered that an oxygen atom diffuses up to the interface with the barrier metal 39 through a grain boundary of the lower electrode 38 and the barrier metal is oxidized. If the postannealing [temperature] is increased, such a phenomenon is accelerated. Also, it is considered that if the grain size of the lower electrode 38 is small, the oxygen is easily diffused. The oxygen diffusion can be suppressed by increasing the grain size to 1000 .ANG. or more, for instance, by raising the formation temperature of the lower electrode (furthermore, the leakage current is also reduced); however, if the grain size is increased, if the patterning due to a dry etching is difficult, the lower electrode is usually formed so that the grain size can be about 500 .ANG. from this viewpoint. Thus, the suppression effect of the oxygen diffusion is weakened.
Accordingly, if the nitride such as TiN and TaN as a barrier metal is oxidized, since it is changed to an insulating oxide, an inferior electrification between the plug 8 and the lower electrode 38 is caused. Therefore, it is necessary to set the postannealing temperature sufficiently lower than the oxidation temperature of the nitride such as TiN and TaN. This is a condition contradictory to the leakage current reduction effect shown in FIG. 17 due to the increase of the postannealing temperature.
FIG. 18 shows a result in which the oxidation start temperature of TiN (barrier metal: a film thickness of 1000 .ANG.) in the lamination structure composed of Pt/TiN/Si is investigated by an X-ray diffraction method. According to the figure, a diffraction peak of TiO.sub.2 showing the oxidation start of TiN starts to be seen at near 600.degree. C. From the result, in case TiN is used as a barrier metal, the postannealing temperature is limited to 600.degree. C. or lower.
The purpose of the present invention is to provide a method for manufacturing a metal oxide barrier such as BST, which can effectively suppress the oxidation of an undercoat metal such as a barrier metal while reducing the heat treatment temperature such as the postannealing temperature and a method for manufacturing a semiconductor memory device having the metal oxide capacitor.